ICS853006 Datasheet, PDF (11/16 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853006
LOW SKEW, 1-TO-6
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 5 shows a schematic example of ICS853006. The
ICS853006 input can accept various types of differential input
signal. In this example, the inputs are driven by an LVPECL driv-
ers. For the ICS853006 LVPECL output driver, an example of
LVPECL driver termination approach is shown in this schematic.
Additional LVPECL driver termination approaches are shown in
the LVPECL Termination Application Note. It is recommended
at least one decoupling capacitor per power pin. The decoupling
capacitors should be physically located near the power pins.
For ICS853006, the unused output can be left floating.
Zo = 50
Zo = 50
3.3V
3.3V
Zo = 50
Zo = 50
3.3V LVPECL
R9
50
C7(Optional)
0.1u
R10
50
R11
50
U1
1
2
3
4
5
VCC
nQ0
Q0
nQ1
6
7
8
9
Q1
nQ2
Q2
VCC
10 ^PCLK
nPCLK
ICS853006
20
VCC
Q5
nQ5
Q4
19
18
17
16
nQ4
Q3
nQ3
VCC
15
14
13
12
VEE ₁₁
VBB
3.3V
Zo = 50
Zo = 50
(U1, 1)
(U1, 8)
3.3V
(U1, 13)
(U1, 20)
C1
0.1u
C2
0.1u
C3
0.1u
C4
0.1u
+
-
R2
R1
50
50
R3
C5 (Optional)
50
0.1u
+
-
R5
R4
50
50
R6
C6 (Optional)
50
0.1u
FIGURE 5. ICS853006 LVPECL CLOCK OUTPUT BUFFER SCHEMATIC EXAMPLE
853006AG
www.icst.com/products/hiperclocks.html
11
REV. A AUGUST 18, 2004