ICS8516 Datasheet, PDF (11/15 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

Integrated
Circuit
Systems, Inc.
ICS8516
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 3. In a 100Ω
differential transmission line environment, LVDS drivers re-
quire a matched load termination of 100Ω across near the
receiver input. For a multiple LVDS outputs buffer, if only par-
tial outputs are used, it is recommended to terminate the un-
used outputs.
3.3V
Zo = 50 Ohm
LVDS_Driver
R1
100
Zo = 50 Ohm
3.3V
CLK
nCLK _HiPerClockS
FIGURE 3. TYPICAL LVDS DRIVER TERMINATION
SCHEMATIC EXAMPLE
Figure 4 shows a schematic example of ICS8516. In this ex-
ample, the input is driven by an LVDS driver. For LVDS buffer,
it is recommended to terminate the unused outputs for better
signal integrity. The decoupling capacitors should be physi-
cally located near the power pin.
VDD=3.3V
Zo = 50 Ohm
R16
100
Zo = 50 Ohm
+
-
LVDS_input
U1
8516
LVDS_Driver
Zo = 50 Ohm
R17
100
Zo = 50 Ohm
13
14
15
16
nQ1
Q1
nQ0
17 ^Q0
18
19
20
GND
nCLK
CLK
21
22
23
24
GND
Q15
nQ15
Q14
nQ14
Q6
nQ6
Q7
48
47
46
45
nQ7 ₄₄
GND
OE1
OE2
43
42
41
GND
nQ8
Q8
nQ9
Q9
40
39
38
37
Zo = 50 Ohm
R10
100
Zo = 50 Ohm
+
-
LVDS_input
8516FY
(U1-1)
(U1-6)
VDD=3.3V
(U1-12)
(U1-25)
(U1-31)
(U1-36)
C1
C2
0.1u
0.1u
C3
C4
C5
C6
0.1u
0.1u
0.1u
0.1u
Decoupling capacitors located near the power pins
Zo = 50 Ohm
R1
100
Zo = 50 Ohm
+
-
LVDS_input
FIGURE 4. ICS8516 LVDS BUFFER SCHEMATIC EXAMPLE
www.icst.com/products/hiperclocks.html
11
REV. B FEBRUARY 21, 2006