9DB233 Datasheet, PDF (11/17 Pages) Integrated Device Technology – Two Output Differential Buffer for PCIe Gen3

9DB233
TWO OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
SMBus Table: Device Control Register, READ/WRITE ADDRESS (D5/D4)
Byte 0
Pin #
Name
Control Function Type
0
1
Bit 7
-
SW_EN
Enables SMBus
Control of bite 1
and 0
PLL Functions
PLL
RW ^{controlled by Functions}
SMBus controlled by
registers
device pins
Bit 6
-
RESERVED
RW
-
Bit 5
-
RESERVED
RW
-
Bit 4
-
RESERVED
RW
-
Bit 3
-
RESERVED
RW
-
Bit 2
-
RESERVED
RW
-
Bit 1
-
PLL BW #adjust
Selects PLL
RW
Low BW
High BW
Bandwidth
Bit 0
-
Bypasses PLL for
PLL bypassed PLL enabled
PLL Enable
board test
RW _{(fan out mode) (ZDB mode)}
Default
1
X
X
X
X
X
1
1
SMBus Table: Output Enable Register
Byte 1
Pin #
Name
Control Function Type
Bit 7
-
RESERVED
RW
Bit 6
-
RESERVED
RW
Bit 5
-
RESERVED
RW
Bit 4
-
RESERVED
RW
Bit 3
-
RESERVED
RW
Bit 2
-
RESERVED
RW
Bit 1
-
RESERVED
RW
Bit 0
-
RESERVED
RW
0
1
-
-
-
-
-
-
-
-
Default
X
X
X
X
X
X
X
X
SMBus Table: Function Select Register
Byte 2
Pin #
Name
Control Function Type
Bit 7
RESERVED
RW
Bit 6
RESERVED
RW
Bit 5
-
RESERVED
RW
Bit 4
-
RESERVED
RW
Bit 3
-
RESERVED
RW
Bit 2
-
RESERVED
RW
Bit 1
-
RESERVED
RW
Bit 0
-
RESERVED
RW
0
1
-
-
-
-
-
-
-
-
Default
X
X
X
X
X
X
X
X
SMBus Table: Vendor & Revision ID Register
Byte 3
Pin #
Name
Control Function Type
0
Bit 7
-
RID3
R
-
Bit 6
-
Bit 5
-
RID2
REVISION ID
R
-
RID1
R
-
Bit 4
-
RID0
R
-
Bit 3
-
VID3
R
-
Bit 2
-
Bit 1
-
VID2
VID1
VENDOR ID
R
R
-
-
Bit 0
-
VID0
R
-
1
Default
-
0
-
0
-
0
-
1
-
0
-
0
-
0
-
1
IDT® TWO OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN3
11
9DB233
REV E 021914