ICS950901 Datasheet, PDF (10/20 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for P4

Integrated
Circuit
Systems, Inc.
ICS950901
Byte 20: Group Skew Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
PCI_Skew 3
PCI_Skew 2
PCI_Skew 1
PCI_Skew 0
PCIF_Skew 3
PCIF_Skew 2
PCIF_Skew 1
PCIF_Skew 0
PWD
1
0
0
0
1
0
0
0
Description
These 4 bits can change the CPU to PCI (7:0) skew from 1.4ns -
2.9ns. Default at power up is - 2.5ns. Each binary increment or
decrement of Bits (3:0) will increase or decrease the delay of the
PCI clocks by 100ps.
These 4 bits can change the CPU to PCIF skew from 1.4ns -
2.9ns. Default at power up is - 2.5ns. Each binary increment or
decrement of Bit (3:0) will increase or decrease the delay of the
PCI clocks by 100ps.
Byte 21: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
PCIF_1_Slew 1
PCIF_1_Slew 0
PCIF_0_Slew 1
PCIF_0_Slew 0
AGP (2:1)_Slew 1
AGP (2:1)_Slew 1
AGP_0_Slew 1
AGP_0_Slew 0
PWD
0
1
0
1
0
1
0
1
Description
PCIFclock slew rate control bits.
01 = strong:11 = normal; 10 = weak
PCI clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
AGP (2:1) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
AGP_0 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
Byte 22: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
REF Slew 1
REF Slew 0
PCI (7:4) Slew 1
PCI (7:4) Slew 0
PCI (3:1) Slew 1
PCI (3:1) Slew 0
PCI0 Slew 1
PCI0 Slew 0
PWD
0
1
0
1
0
1
0
1
Description
REF clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI (6:4) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI (3:1) clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
PCI0 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
Byte 23: Slew Rate Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Reserved
Reserved
48-24 Slew 1
48-24 Slew 0
48-24 Slew 1
48-24 Slew 0
PWD
X
X
X
X
0
1
0
1
Reserved
Description
Reserved
48-24 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
48-24 clock slew rate control bits.
01 = strong: 11 = normal; 10 = weak
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