ICS8516I Datasheet, PDF (10/13 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

Integrated
Circuit
Systems, Inc.
ICS8516I
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
SCHEMATIC EXAMPLE
Figure 4 shows a schematic example of ICS8516I. In this ex-
ample, the input is driven by an LVDS driver. For LVDS buffer, it
is recommended to terminate the unused outputs for better sig-
nal integrity. The decoupling capacitors should be physically
located near the power pin.
LVDS_Driver
Zo = 50 Ohm
R17
100
Zo = 50 Ohm
VDD=3.3V
13
14
15
16
nQ1
Q1
nQ0
17 ^Q0
18
19
20
GND
nCLK
CLK
21
22
23
24
GND
Q15
nQ15
Q14
nQ14
U1
8516
48
Q6
nQ6
Q7
47
46
45
nQ7 ₄₄
GND
OE1
OE2
43
42
41
GND
nQ8
Q8
nQ9
Q9
40
39
38
37
Zo = 50 Ohm
R16
100
Zo = 50 Ohm
+
-
LVDS_input
Zo = 50 Ohm
R10
100
Zo = 50 Ohm
+
-
LVDS_input
(U1-1)
(U1-6)
VDD=3.3V
(U1-12)
(U1-25)
(U1-31)
(U1-36)
C1
C2
0.1u
0.1u
C3
C4
C5
C6
0.1u
0.1u
0.1u
0.1u
Decoupling capacitors located near the power pins
Zo = 50 Ohm
R1
100
Zo = 50 Ohm
+
-
LVDS_input
FIGURE 4. ICS8516I LVDS BUFFER SCHEMATIC EXAMPLE
RELIABILITY INFORMATION
TABLE 6. θ_JAVS. AIR FLOW TABLE FOR 48 LEAD LQFP
θ_JA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
67.8°C/W
47.9°C/W
200
55.9°C/W
42.1°C/W
500
50.1°C/W
39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS8516I is: 1821
8516FYI
www.icst.com/products/hiperclocks.html
10
REV. A JULY 30, 2004