ICS9DB106 Datasheet, PDF (1/9 Pages) Integrated Circuit Systems – 6 Output PCI Express Buffer with CLKREQ Function

Integrated
Circuit
Systems, Inc.
ICS9DB106
Preliminary Product Preview
6 Output PCI Express* Buffer with CLKREQ# Function
Recommended Application:
Pin Configuration
1-to-6 Zero-delay or fanout buffer for PCI Express
PLL_BW 1
28 VDDA
Output Features:
CLK_INT 2
• 6 - 0.7V current mode differential output pairs (HSCL) ^{CLK_INC 3}
• SMBus for complete device control
*CLKREQ1# 4
PCIEXT0 5
27 GNDA
26 IREF
25 **CLKREQ4#
24 PCIEXT5
Key Specifications:
• Cycle-to-cycle jitter < 40ps
• Output-to-output skew < 30 ps
PCIEXC0 6
VDD 7
GND 8
PCIEXT1 9
23 PCIEXC5
22 VDD
21 GND
20 PCIEXT4
Features/Benefits:
• CLKREQ# pin for outputs 1 and 4/output enable for
Express Card applications
PCIEXC1 10
PCIEXT2 11
PCIEXC2 12
19 PCIEXC4
18 PCIEXT3
17 PCIEXC3
• PLL or bypass mode/PLL can dejitter incoming clock
VDD 13
16 VDD
• Selectable PLL bandwidth/minimizes jitter peaking in _{SMBDAT 14}
15 SMBCLK
downstream PLL’s
• Spread Spectrum Compatible/tracks spreading input ^Note:
clock for low EMI
Pins preceeded by '**' have internal 120K ohm pull down resistors
• SMBus Interface/unused outputs can be disabled
28-pin SSOP & TSSOP
0833A—07/26/04
*Other names and brands may be claimed as the property of others.
PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to
change without notice.