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ICS952301 Datasheet, PDF (1/12 Pages) Integrated Circuit Systems – Frequency Timing Generator for Transmeta Systems
Integrated
Circuit
Systems, Inc.
ICS952301
Advance Information
Frequency Timing Generator for Transmeta Systems
Recommended Application:
Transmeta
Output Features:
• 1CPU up to 66.6MHz &
overclocking of 66MHz.
• 7 PCI (3.3V) @ 33.3MHz (all are free running
selectable) w/ 2 selectable 1X/2X.
• 1 REF (3.3V) at 14.318MHz.
• 1 48MHz (3.3V).
• 1 24_48MHz selectable output.
Features:
• Supports Spread Spectrum modulation for CPU and
PCI clocks, default -2.0% downspread.
• Efficient Power management scheme through stop
clocks and power down modes.
• Uses external 14.318MHz crystal, no external load
cap required for CL=18pF crystal.
• 28-pin TSSOP package, 4.40mm (173mil).
Skew Characteristics:
• PCI – PCI < 500ps
• CPU(early) – PCI = 1.5ns – 4ns.
Pin Configuration
GNDREF 1
X1 2
X2 3
PD# 4
PCICLK0 5
PCICLK1 6
GNDPCI 7
VDDPCI 8
PCICLK21 9
PCICLK3 10
PCICLK41 11
GNDPCI 12
VDDPCI 13
PCICLK5 14
28 VDDREF
27 REF/ 1X or 2X Programmable*
26 CPU_STOP#
25 VDDCPU/CORE
24 GNDCPU/CORE
23 CPUCLK0
22 PCI_STOP#
21 SCLK
20 VDD48
19 GND48
18 48MHz
17 24-48MHz/Sel 48_24#*
16 SDATA
15 PCICLK6
28-Pin 173mil TSSOP
Note: ^ Internal Pulldown Resistor
* Internal Pullup Resistor
1 1X/2X Programmable
Block Diagram
X1
XTAL
X2
OSC
REF
SCLOCK
SDATA
PD#
PCI_STOP#
SEL48_24#
CPU_STOP#
CPU
PLL
Control
Logic
PCI DIV
STOP
STOP
CPU
PCI(6:0)
48MHz
PLL
STOP
48MHz
Power Groups
VDD_Core, GND_Core = PLL core
24/48 STOP
24/48MHz
VDDREF, GNDREF = REF, X1, X2
VDDPCI, GNDPCI = PCICLK (6:0)
VDD48, GND48 = 48MHz (1:0)
0673—07/09/02
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ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.
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