ICS9248-141 Datasheet, PDF (1/14 Pages) Integrated Circuit Systems – AMD - K7™ System Clock Chip

Integrated
Circuit
Systems, Inc.
ICS9248-141
AMD - K7™ System Clock Chip
Recommended Application:
VIA KX133 style chipset
Output Features:
• 1 - Differential pair open drain CPU clocks
• 1 - Single-ended open drain CPU clock
• 13 - SDRAM @ 3.3V
• 6 - PCI @3.3V,
• 1 - 48MHz, @3.3V fixed.
• 1 - 24/48MHz @ 3.3V
• 2 - REF @3.3V, 14.318MHz.
Features:
• Up to 166MHz frequency support
• Support power management: CPU stop and Power down
Mode from I²C programming.
• Spread spectrum for EMI control
(± 0.25% center spread).
• Uses external 14.318MHz crystal
Pin Configuration
VDDREF
1
REF0/CPU_STOP#*
2
GND
3
X1
4
X2
5
VDDPCI
6
*MODE/PCICLK_F
7
*FS3/PCICLK0
8
GND
9
*SEL24_48#/PCICLK1
10
PCICLK2
11
PCICLK3
12
PCICLK4
13
VDDPCI
14
BUFFER IN
15
GND
16
SDRAM11
17
SDRAM10
18
VDDSDR
19
SDRAM9
20
SDRAM8
21
GND
22
SDATA
23
SCLK
24
48
REF1/FS2*
47
GND
46
CPUCLKT1
45
GND
44
CPUCLKC0
43
CPUCLKT0
42
VDDA
41
PD#*
40
SDRAM_OUT
39
GND
38
SDRAM0
37
SDRAM1
36
VDDSDR
35
SDRAM2
34
SDRAM3
33
GND
32
SDRAM4
31
SDRAM5
30
VDDSDR
29
SDRAM6
28
SDRAM7
27
VDD48
26
48MHz/FS0*
25
24/48MHz/FS1*
48-Pin 300mil SSOP
* Internal Pull-up Resistor of 120K to VDD
Block Diagram
PLL2
X1
X2
SEL24_48#
SDATA
SCLK
FS (3:0)
PD#
CPU_STOP#
BUFFER IN
XTAL
OSC
PLL1
Spread
Spectrum
Control
Logic
Config.
Reg.
/2
CPU
DIVDER
Stop
PCI
DIVDER
SDRAM
DRIVER
Functionality
48MHz
24_48MHz
REF (1:0)
CPUCLKC0
CPUCLKT (1:0)
PCICLK (4:0)
PCICLK_F
SDRAM (11:0)
SDRAM_OUT
FS3 FS2 FS1 FS0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
CPU
(MHz)
90.00
95.00
101.00
102.00
100.90
103.00
105.00
100.00
107.00
109.00
110.00
111.00
113.00
115.00
117.00
133.30
PCICLK
(MHz)
30.00
31.67
33.67
34.00
33.57
34.33
35.00
33.33
35.67
36.33
36.67
37.00
37.67
38.33
39.00
33.33
9248-141 Rev B 01/18/01
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