ICS9159-13 Datasheet, PDF (1/7 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffer for PENTIUM

Integrated
Circuit
Systems, Inc.
ICS9159-13
Frequency Generator and Integrated Buffer for PENTIUM™
General Description
The ICS9159-13 generates all clocks required for high
speed RISC or CISC microprocessor systems such as 486,
Pentium, PowerPC,™ etc. Four different reference frequency
multiplying factors are externally selectable with smooth
frequency transitions. A test mode is provided to drive all
clocks directly.
High drive BCLK outputs provide typically greater than
1V/ns slew rate into 30pF loads. PCLK outputs provide
typically better than 1V/ns slew rate into 20pF loads while
maintaining 50±5% duty cycle.
Features
• Generates up to six processor and six bus clocks, plus
two reference clocks
• Synchronous clocks skew matched to 250ps window
on PCLKs and 500ps window on BCLKs
• Processor and bus clocks synchronized to each other,
PCLK to BCLK skew window 600ps max
• Test clock mode eases system design
• 3.0V - 5.5V supply range
• 28-pin SOIC package
Block Diagram
Pin Cnfiguration
9159-13 Rev B 060497
28-Pin SOIC
Functionality
OEN FS1
1
0
1
0
1
1
1
1
0
X
FS0 PCLK BCLK
REF
0 50MHz 25 MHz 14.318 MHz
1 66.6 MHz 33.3 MHz 14.318 MHz
0 60 MHz 30 MHz 14.318 MHz
1 TCLK/2 TCLK/4
TCLK
X Tristate Tristate
Tristate
Pentium is a trademark of Intel Corporation.
PowerPC is a trademark of Motorola Corporation.
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.