ICS9159-12 Datasheet, PDF (1/5 Pages) Integrated Circuit Systems – Frequency Generator and Buffers for Mobile Pentium Systems

Integrated
Circuit
Systems, Inc.
ICS9159-12
Frequency Generator and Buffers for Mobile Pentium™ Systems
General Description
The ICS9159-12 generates all clocks required for mobile
microprocessor systems based on Pentium/Mobile Triton
chip sets. Three different reference frequency multiplying
factors are externally selectable with smooth frequency
transitions. These multiplying factors can be customized
for specific plications. A test mode is provided to drive all
clocks directly.
High drive BCLK outputs provide greater than 1V/ns slew
rate into 30pF loads. PCLK outputs provide better than 1V/
ns slew rate into 20pF loads while maintaining ±5% duty
cycle.
Block Diagram
Features
• Generates 14 clocks including processor, disk
and reference
• Meets all Pentium/Mobile Triton 82430MX
requirments
• Independent buffers provide 4 and 6 clock copies
• Buffered clocks skew matched to ±250ps
• Buffer inputs are 5V tolerant
• Test clock mode eases system design
• Selectable multiplying and processor/bus ratios
• Custom configurations available
• 3.0V- 5.5V supply range
• 28pin, .209" SSOP package
Pin Configuration
Functionality
FS1 FS0 *VCO
0 0 118/17*X1
0 1 65/7*X1
1 0 92/11*X1
1 1 Test mode
X1, REF
(MHz)
14.318
14.318
14.318
TCLK
CPU (MHz)
50 (49.69)
66.6 (66.47)
60 (59.87)
TCLK/2
*VCO range is limited form 60 - 200 MHz.
CPU
VCO/2
TCLK/2
24M
24 MHz
TCLK/4
9159-12 Rev B 071797
28-Pin SSOP
Pentium is a trademark of Intel Corporation.
ICS reserves the right to make changes in the device data identified in this publication
without further notice. ICS advises its customers to obtain the latest version of all
device data to verify that any information being relied upon by the customer is current
and accurate.