ICS9112-26 Datasheet, PDF (1/4 Pages) Integrated Circuit Systems – Low Skew Output Buffer

Integrated
Circuit
Systems, Inc.
ICS9112-26
Low Skew Output Buffer
General Description
The ICS9112-26 is a high performance, low skew, low jitter
clock driver. It is designed to distribute high speed clocks in
PC systems operating at speeds from 0 to 133 MHz.
The ICS9112-26 comes in an eight pin 150 mil SOIC package.
It has four output clocks.
Features
• Frequency range 0 - 133 MHz (3.3V)
• Less than 200 ps Jitter between outputs
• Skew controlled outputs
• Skew less than 250 ps between outputs
• Available in 8 pin 150 mil SOIC &
173 mil TSSOP packages.
• 3.3V ±10% operation
Block Diagram
Pin Configuration
CLK_IN
CLK0
CLK1
CLK2
CLK0 1
VDD 2
GND 3
CLK1 4
8 CLK_IN
7 CLK3
6 VDD
5 CLK2
8 pin SOIC & TSSOP
CLK3
Pin Descriptions
PIN NUMBER
1
2,6
3
4
5
7
8
PIN NAME
CLK0¹
VDD
GND
CLK1¹
CLK2¹
CLK3¹
CLK_IN
TYPE
OUT
PWR
PWR
OUT
OUT
OUT
IN
Notes:
1. Weak pull-down on all outputs
Buffered clock output
Power Supply (3.3V)
Ground
Buffered clock output
Buffered clock output
Buffered clock output
Input reference frequency.
DESCRIPTION
9112-26 Rev B- 07/16/01
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.