ICS853111-01 Datasheet, PDF (1/15 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853111-01
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-3.3V LVPECL/ECL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS853111-01 is a low skew, high perfor-
ICS
mance 1-to-9 Differential-to-3.3V LVPECL/ECL
HiPerClockS™ _{Fa n o u t B u f f e r a n d a m e m b e r o f t h e}
HiPerClockS ™ family of High Performance
Clock Solutions from ICS. The PCLK, nPCLK
pair can accept LVPECL, CML and SSTL differential input
levels.The ICS853111-01 is characterized to operate from
a 3.3V power supply. Guaranteed output and part-to-part
skew characteristics make the ICS853111-01 ideal for
those clock distribution applications demanding well
defined performance and repeatability.
FEATURES
• 9 differential 3.3V LVPECL / ECL outputs
• 1 differential LVPECL input pair
• PLCK, nPLCK pair can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: >2GHz (typical)
• Translates any single ended input signal to 3.3V
LVPECL levels with resistor bias on nPCLK input
• Additive phase jitter, RMS: 0.03ps (typical)
• Output skew: 35ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Propagation delay: 675ps (maximum)
• LVPECL mode operating voltage supply range:
V = 3V to 3.8V, V = 0V
CC
EE
• ECL mode operating voltage supply range:
V_CC = 0V, V_EE = -3V to -3.8V
• -40°C to 85°C ambient operating temperature
• Lead-Free package RoHS compliant
BLOCK DIAGRAM
PCLK
nPCLK
V
BB
PIN ASSIGNMENT
Q0
nQ0
Q1
nQ1
Q2
nQ2
25 24 23 22 21 20 19
VEE 26
18 Q3
nc 27
17 nQ3
Q3
PCLK 28
16 Q4
nQ3
VCC 1 ICS853111-01 15 VCCO
Q4
nQ4
Q5
nQ5
Q6
nQ6
nPCLK 2
14 nQ4
VBB 3
13 Q5
nc 4
12 nQ5
5 6 7 8 9 10 11
Q7
nQ7
28-Lead PLCC
Q8
nQ8
11.6mm x 11.4mm x 4.1mm package body
V Package
Top View
853111AV-01
www.icst.com/products/hiperclocks.html
1
REV. A APRIL 25, 2005