English
Language : 

ICS844004I-04 Datasheet, PDF (1/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL/LVCMOS-TO-LVDS FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844004I-04
FEMTOCLOCKS™ CRYSTAL/LVCMOS-TO-
LVDS FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS844004I-04 is a 4 output LVDS
ICS
Synthesizer optimized to generate clock
HiPerClockS™ frequencies for a variety of high performance
applications and is a member of the
HiPerClocksTM family of high performance
clock solutions from ICS. This device can select its input
reference clock from either a crystal input or a single-
ended clock signal. It can be configured to generate 4
outputs with individually selectable divide-by-one or
divide-by-four function via the 4 frequency select pins
(F_SEL[3:0]). The ICS844004I-04 uses ICS’ 3rd generation
low phase noise VCO technology and can achieve 1ps
or lower typical rms phase jitter. This ensures that it
will easily meet clocking requirements for SDH (STM-1/
STM-4/STM-16) and SONET (OC-3/OC12/OC-48). This
device is suitable for multi-rate and multiple port line
card applications. The ICS844004I-04 is conveniently
packaged in a small 24-pin TSSOP package.
FEATURES
• Four LVDS outputs
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Supports the following applications: SONET/SDH, SATA,
or 10Gb Ethernet
• Output frequency range: 140MHz - 170MHz,
560MHz - 680MHz
• VCO range: 560MHz - 680MHz
• Crystal oscillator and CLK range: 17.5MHz - 21.25MHz
• RMS phase jitter @ 622.08MHz output, using a 19.44MHz
crystal (12kHz - 20MHz): 0.71ps (typical)
• RMS phase jitter @ 156.25MHz output, using a 19.53125MHz
crystal (1.875MHz - 20MHz): 0.51ps (typical)
• RMS phase jitter @ 155.52MHz output, using a 19.44MHz
crystal (12kHz - 5MHz): 0.75ps (typical)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
XTAL_IN
OSC 0
÷1
XTAL_OUT
Phase
VCO
CLK Pulldown
1
Detector
÷4
INPUT_SEL Pulldown
M = ÷32
MR Pulldown
F_SEL0 Pullup
F_SEL1 Pullup
F_SEL2 Pullup
0
Q0
nQ0
1
0
Q1
1
nQ1
0
Q2
1
nQ2
nQ1 1
Q1 2
VDDo 3
Q0 4
nQ0 5
MR 6
F_SEL3 7
nc 8
VDDA 9
F_SEL0 10
VDD 11
F_SEL1 12
24 nQ2
23 Q2
2 2 VDDO
21 Q3
20 nQ3
19 GND
18 F_SEL2
17 INPUT_SEL
16 CLK
15 GND
14 XTAL_IN
13 XTAL_OUT
ICS844004I-04
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
0
Q3
1
nQ3
F_SEL3 Pullup
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
844004AGI-04
www.icst.com/products/hiperclocks.html
REV. A JANUARY 26, 2006
1