ICS554-01 Datasheet, PDF (1/5 Pages) Integrated Circuit Systems – LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT

PRELIMINARY INFORMATION
ICS554-01
LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT
Description
The ICS554-01 is a low skew clock buffer with a single
complimentary PECL input to four PECL outputs. Part
of ICS’ Clock Blocks^TM family, this is our lowest skew
PECL clock buffer. For parts which do not require PECL
inputs or outputs, see the ICS553 for a 1 to 4 low skew
buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For
more than 8 outputs see the MK74CBxxx Buffalo^TM
series of clock drivers.
ICS makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
• Outputs are skew matched to within 50ps
• Packaged in 16 pin TSSOP
• One PECL input to 4 PECL output clock drivers
• Operating Voltages of 3.3V to 5V
Block Diagram
IN
IN
VDD
1.1kΩ
0.01mF
RES
VDD
62Ω 62Ω
Q0
Q0
270Ω 270Ω
VDD
62Ω 62Ω
Q2
Q2
270Ω 270Ω
VDD
62Ω 62Ω
Q1
Q1
270Ω 270Ω
VDD
62Ω 62Ω
Q3
Q3
270Ω 270Ω
MDS 554-01 A
1
Revision 031901
Integrated Circuit Systems G 525 Race Street, San Jose, CA 95126 G tel [phone] G www.icst.com