ICS508 Datasheet, PDF (1/5 Pages) Integrated Circuit Systems – PECL to CMOS Converter

PRELIMINARY INFORMATION
ICS508
PECL to CMOS Converter
Description
The ICS508 is the most cost effective way to
generate a high quality, high frequency CMOS
clock output from a PECL clock input.
The ICS508 has separate VDD supplies for the
PECL input buffer and the output buffer allowing
different voltages to be used. For example, the
input clock could use a 3.3 V supply while the
output operates from 2.5 V.
The device has an Output Enable pin that tri-states
the clock output when the OE pin is taken low.
The ICS508 is a member of the ClockBlocks™
family of devices.
Features
• Packaged as 8 pin SOIC or die
• Separate VDD supplies allow voltage
translation
• Clock frequency of 0 - 250 MHz
• Duty cycle of 45/55
• Operating voltages of 2.375 to 5.5 V
• Tri-state output for board level testing
• 24 mA drive capability
• Industrial temperature version available
• Advanced, low power CMOS process
Block Diagram
VDDP
VDDC
PECLIN
PECLIN
GND
Output
Buffer
CLK
OE GND
MDS 508 C
1
Revision 012400
Printed 11/13/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•[phone]tel • www.icst.com