IC61LV6416 Datasheet, PDF (6/9 Pages) Integrated Circuit Solution Inc – 64K x 16 Hight Speed SRAM with 3.3V

IC61LV6416
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS = OE = VIL, UB or LB = VIL)
ADDRESS
DOUT
t RC
t AA
t OHA
PREVIOUS DATA VALID
t OHA
DATA VALID
READ CYCLE NO. 2^(1,3)
ADDRESS
OE
tRC
tAA
CE
LB, UB
tLZCE
DOUT
tLZB
HIGH-Z
tDOE
tLZOE
tACE
tBA
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
tOHA
tHZOE
tHZCE
DATA VALID
tHZB
6
Integrated Circuit Solution Inc.
AHSR026-0A 09/12/2001