IC61LV6416 Datasheet, PDF (3/9 Pages) Integrated Circuit Solution Inc – 64K x 16 Hight Speed SRAM with 3.3V

IC61LV6416
PIN CONFIGURATIONS
44-Pin SOJ
A15 1
A14 2
A13 3
A12 4
A11 5
CE 6
I/O0 7
I/O1 8
I/O2 9
I/O3 10
Vcc 11
GND 12
I/O4 13
I/O5 14
I/O6 15
I/O7 16
WE 17
A10 18
A9 19
A8 20
A7 21
NC 22
44 A0
43 A1
42 A2
41 OE
40 UB
39 LB
38 I/O15
37 I/O14
36 I/O13
35 I/O12
34 GND
33 Vcc
32 I/O11
31 I/O10
30 I/O9
29 I/O8
28 NC
27 A3
26 A4
25 A5
24 A6
23 NC
44-Pin TSOP-2
A15 1
A14 2
A13 3
A12 4
A11 5
CE 6
I/O0 7
I/O1 8
I/O2 9
I/O3 10
Vcc 11
GND 12
I/O4 13
I/O5 14
I/O6 15
I/O7 16
WE 17
A10 18
A9 19
A8 20
A7 21
NC 22
44 A0
43 A1
1
42 A2
41 OE
40 UB
39 LB
38 I/O15
2
37 I/O14
36 I/O13
35 I/O12
34 GND
33 Vcc
3
32 I/O11
31 I/O10
30 I/O9
29 I/O8
28 NC
4
27 A3
26 A4
25 A5
24 A6
23 NC
5
48-Pin 6x8mm TF-BGA
1 23 45 6
A
LB
OE
A3
A7
A6 N/C
B
I/O0
UB
A2
A1
CE I/O15
C
I/O1 I/O2 A0
A4 I/O13 I/O14
D
GND I/O₃ NC
A5 I/O₁₂ Vcc
E
Vcc I/O4
NC
NC I/O11 GND
F
I/O5 I/O₆
A9
A8 I/O10 I/O9
G
I/O7
NC
A11 A10 WE
I/O8
H
NC A12 A13 A14 A15 NC
TRUTH TABLE
Mode
WE
CE
OE
Not Selected
X
H
X
Output Disabled
H
L
H
X
L
X
Read
H
L
L
H
L
L
H
L
L
Write
L
L
X
L
L
X
L
L
X
Integrated Circuit Solution Inc.
AHSR026-0A 09/12/2001
PIN DESCRIPTIONS
6
A0-A15
Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CE
Chip Enable Input
7
OE
Output Enable Input
WE
Write Enable Input
LB
Lower-byte Control (I/O0-I/O7)
8
UB
Upper-byte Control (I/O8-I/O15)
NC
No Connection
Vcc
Power
9
GND
Ground
LB
UB
X
X
X
X
H
H
L
H
H
L
L
L
L
H
H
L
L
L
10
I/O PIN
I/O0-I/O7 I/O8-I/O15 Vcc Current
High-Z
High-Z
ISB1, ISB2
11
High-Z
High-Z
ICC
High-Z
High-Z
DOUT
High-Z
ICC
High-Z
DOUT
DOUT
DOUT
12
DIN
High-Z
ICC
High-Z
DIN
DIN
DIN
3