IC61LV25616 Datasheet, PDF (5/11 Pages) Integrated Circuit Solution Inc – 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IC61LV25616
CAPACITANCE⁽¹⁾
Symbol
Parameter
Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
-8
Min. Max.
-10
Min. Max.
-12
Min. Max.
-15
Min. Max. Unit
tRC Read Cycle Time
8—
10 —
12 —
15 — ns
tAA Address Access Time
—8
— 10
— 12
— 15 ns
tOHA
tACE
tDOE
tHZOE⁽²⁾
tLZOE⁽²⁾
tHZCE⁽²
tLZCE⁽²⁾
tBA
tHZB
tLZB
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
3—
—8
—4
04
0—
04
3—
—4
04
0—
3—
— 10
—5
—5
0—
05
3—
—5
05
0—
3—
— 12
—6
—6
0—
06
3—
—6
06
0—
3 — ns
— 15 ns
— 7 ns
0 6 ns
0 — ns
0 6 ns
3 — ns
— 7 ns
0 6 ns
0 — ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
Notes:
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
3.3V
319 Ω
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1
Integrated Circuit Solution Inc.
AHSR022-0A 09/11/2001
353 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2
353 Ω
1
2
3
4
5
6
7
8
9
10
11
12
5