IS61LV256 Datasheet, PDF (4/8 Pages) Integrated Circuit Solution Inc – 32K X 8 LOW VOLTAGE CMOS STATIC RAM

IS61LV256
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACE CE Access Time
tDOE OE Access Time
tLZOE OE to Low-Z Output
tHZOE OE to High-Z Output
tLZCE CE to Low-Z Output
tHZCE CE to High-Z Output
tPU^! CE to Power-Up
tPD^" CE to Power-Down
-8 ns
-10 ns
-12 ns
-15 ns
-20 ns
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
8 — 10 — 12 — 15 — 20 — ns
— 8 — 10 — 12 — 15 — 20 ns
2 — 2 — 2 — 2 — 2 — ns
— 8 — 10 — 12 — 15 — 20 ns
— 4 — 5 — 6 — 7 — 8 ns
0 — 0 — 0 — 0 — 0 — ns
— 4 — 5 — 5 — 6 — 6 ns
3 — 3 — 3 — 3 — 3 — ns
— 4 — 5 — 6 — 7 — 7 ns
0 — 0 — 0 — 0 — 0 — ns
— 8 — 10 — 12 — 15 — 20 ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0 to 3.0V and output loading specified in .igure 1.
2. Tested with the load in .igure 2. Transition is measured ±200 mV from steady-state voltage. Not 100%
tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and .all Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See .igures 1 and 2
AC TEST LOADS
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
.igure 1.
4
353 Ω
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
353 Ω
.igure 2.
Integrated Circuit Solution Inc.
SR004-0D