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IC62C256 Datasheet, PDF (4/10 Pages) Integrated Circuit Solution Inc – 32K X 8 LOW POWER CMOS STATIC RAM
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READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACS CS Access Time
tDOE OE Access Time
tLZOE  OE to Low-Z Output
tHZOE  OE to High-Z Output
tLZCS  CS to Low-Z Output
tHZCS  CS to High-Z Output
tPU! CS to Power-Up
tPD! CS to Power-Down
-45 ns
-70 ns
Min. Max.
Min. Max.
Unit
45 —
70
—
ns
— 45
—
70
ns
2—
2
—
ns
— 45
—
70
ns
— 25
—
35
ns
0—
0
—
ns
0 20
0
25
ns
3—
3
—
ns
0 20
0
25
ns
0—
0
—
ns
— 30
—
50
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in .igure 1.
2. Tested with the load in .igure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and .all Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See .igures 1 and 2
AC TEST LOADS
480 Ω
5V
OUTPUT
100 pF
Including
jig and
scope
.igure 1.
255 Ω
480 Ω
5V
OUTPUT
5 pF
Including
jig and
scope
.igure 2.
255 Ω
4
Integrated Circuit Solution Inc.
ALSR010-0A 05/23/2001