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IC62C256 Datasheet, PDF (1/10 Pages) Integrated Circuit Solution Inc – 32K X 8 LOW POWER CMOS STATIC RAM
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32K x 8 LOW POWER CMOS STATIC RAM
.EATURES
• Access time: 45, 70 ns
• Low active power: 200 mW (typical)
• Low standby power
— 250 µW (typical) CMOS standby
— 28 mW (typical) TTL standby
• .ully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 5V power supply
DESCRIPTION
The 1+51 IC62C256 is a low power, 32,768 word by 8-bit
CMOS static RAM. It is fabricated using 1+51's high-
performance, low power CMOS technology.
When CS is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down to
250 µW (typical) at CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Select (CS) input and an active LOW Output Enable (OE)
input. The active LOW Write Enable (WE) controls both writing
and reading of the memory.
The IC62C256 is pin compatible with other 32K x 8 SRAMs in
330mil SOP or 8*13.4mm TSOP-1 package.
.UNCTIONAL BLOCK DIAGRAM
A0-A14
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
32K X 8
MEMORY ARRAY
COLUMN I/O
CS
CONTROL
OE
CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
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ALSR010-0A 05/23/2001