IC42S32800 Datasheet, PDF (21/62 Pages) Integrated Circuit Solution Inc – 2M x 32 Bit x 4 Banks (256-MBIT) SDRAM

IC42S32800
IC42S32800L
Recommended D.C.Operating Conditions (VDD =3.3V ± 0.3V,Ta =0~70 C)
Description/Test condition
Symbol
Operating Current
tRC ≥ tRC(min), Outputs Open, Input
signal one transition per one cycle
1 bank
operation
Precharge Standby Current in power down mode
tCK = 15ns, CKE ≤ VIL(max)
Precharge Standby Current in power down mode
tCK = ∞, CKE ≤ VIL(max)
Precharge Standby Current in non-power down mode
tCK = 15ns, CS# ≥ VIH(min), CKE ≥ V_IH
Input signals are changed once during 30ns.
Precharge Standby Current in non-power down mode
tCK = ∞, CLK ≤ VIL(max), CKE ≥ V_IH
Active Standby Current in power down mode
C KE ≤ VIL(max), tCK = 15ns
Active Standby Current in power down mode
CKE& CLK ≤ VIL(max), tCK = ∞
Active Standby Current in non-power down mode
CKE ≥ VIH(min), CS# ≥ VIH(min), tCK = 15ns
Active Standby Current in non-power down mode
CKE ≥ VIH(min), CLK ≤ VIL(max), tCK = ∞
Operating Current (Burst mode)
tCK =tCK(min), Outputs Open, Multi-bank interleave
Refresh Current
tRC ≥ tRC(min)
Self Refresh Current
C KE ≤ 0.2V
ICC1
ICC2P
ICC2PS
ICC2N
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
ICC5
ICC6
- 6/7
Max.
135/125
3
2
20
9
4
3
45
30
180/150
300/270
1 (L-Version)
3
Unit Note
3
3
3
mA 3
3
3, 4
3
Parameter
Description
Min.
IIL
Input Leakage Current
-1
(0V ≤ VIN ≤ VDD, All other pins not under test = 0V )
IOL
Output Leakage Current
(0V ≤ VOUT ≤ VDD, DQ disable )
- 1.5
VOH
LVTTL Output "H" Level Voltage
( IOUT = -2mA )
2.4
VOL
LVTTL Output "L" Level Voltage
( IOUT = 2mA )
Max.
+1
+ 1.5
0.4
Unit Note
µA
µA
V
V
Integrated Circuit Solution Inc.
21
DR046-0B 12/21/2004