IC41C4100 Datasheet, PDF (2/21 Pages) Integrated Circuit Solution Inc – 1Mx4 bit Dynamic RAM with EDO Page Mode

IC41C4100
IC41LV4100
1M x 4 (4-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
FEATURES
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval: 1024 cycles /16 ms
• Refresh Mode: RAS-Only, CAS-before-RAS (CBR),
Hidden
DESCRIPTION
The ICSI IC41C4100 and IC41LV4100 is a 1,048,576 x 4-bit
high-performance CMOS Dynamic Random Access Memories.
The IC41C4100 offer an accelerated cycle access called EDO
Page Mode. EDO Page Mode allows 1024 random accesses
within a single row with access cycle time as short as 12 ns per
4-bit word.
• Single power supply:
5V ± 10% (IC41C4100)
3.3V ± 10% (IC41LV4100)
• Industrail Temperature Range -40^oC to 85^oC
These features make the IC41C4100and IC41LV4100 ideally
suited for, digital signal processing, high-performance audio
systems, and peripheral applications.
The IC41C4100 is packaged in a 20-pin 300mil SOJ and 300mil
TSOP-2.
KEY TIMING PARAMETERS
Parameter
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
Max. Column Address Access Time (tAA)
Min. EDO Page Mode Cycle Time (tPC)
Min. Read/Write Cycle Time (tRC)
-35
-50
-60
Unit
35
50
60
ns
10
14
15
ns
18
25
30
ns
12
20
25
ns
60
90
110
ns
PIN CONFIGURATION
20 (26) Pin SOJ, TSOP-2
I/O0 1
I/O1 2
WE 3
RAS 4
A9 5
26 GND
25 I/O3
24 I/O2
23 CAS
22 OE
A0 9
A1 10
A2 11
A3 12
VCC 13
18 A8
17 A7
16 A6
15 A5
14 A4
PIN DESCRIPTIONS
A0-A9
I/O0-3
WE
OE
RAS
CAS
Vcc
GND
NC
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
No Connection
2
Integrated Circuit Solution Inc.
DR027-0A 09/05/2001