IC61SP12832 Datasheet, PDF (14/16 Pages) Integrated Circuit Solution Inc – 128K x 32 Pipelined SyncBurst SRAM

IC61SP12832
IC61SP12836
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol Parameter
-166
-150
-133
-117
-5
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tKC
Cycle Time
6—
6.7 —
7.5 —
8.5 —
10 —
ns
tKH
Clock High Time
2.4 —
2.6 —
2.8 —
3.4 —
4—
ns
tKL
Clock Low Time
2.4 —
2.6 —
2.8 —
3.4 —
4—
ns
tKQ
Clock Access Time
— 3.5
— 3.8
—4
—4
—5
ns
tKQX⁽¹⁾ Clock High to Output Invalid
1.5 —
1.5 —
1.5 —
2—
2.5 —
ns
tKQLZ^(1,2) Clock High to Output Low-Z
0—
0—
0—
0—
0—
ns
tKQHZ^(1,2) Clock High to Output High-Z
1.5 3.6 1.5 6.7 1.5 7.5 1.5 8.5 1.5 10
ns
tOEQ Output Enable to Output Valid — 3.5
— 3.5
— 3.9
—4
—5
ns
tOEQX⁽¹⁾ Output Disable to Output Invalid 0
—
0—
0—
0—
0—
ns
tOELZ^(1,2) Output Enable to Output Low-Z 0
—
0—
0—
0—
0—
ns
tOEHZ^(1,2) Output Disable to Output High-Z 2 3.5
2 3.5
2 3.8
24
2
5
ns
tAS
Address Setup Time
1.5 —
1.5 —
1.5 —
1.5 —
1.5 —
ns
tSS
Address Status Setup Time
1.5 —
1.5 —
1.5 —
1.5 —
1.5 —
ns
tCES Chip Enable Setup Time
1.5 —
1.5 —
1.5 —
1.5 —
1.5 —
ns
tAH
Address Hold Time
0.5 —
0.5 —
0.5 —
0.5 —
0.5 —
ns
tSH
Address Status Hold Time
0.5 —
0.5 —
0.5 —
0.5 —
0.5 —
ns
tCEH Chip Enable Hold Time
0.5 —
0.5 —
0.5 —
0.5 —
0.5 —
ns
tZZS ZZ Standby
2—
2—
2—
2—
2 — cyc
tZZREC ZZ Recovery
2—
2—
2—
Notes:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
2—
2 — cyc
14
Integrated Circuit Solution Inc.
SSR019-0A 09/17/2001