X25320 Datasheet, PDF (5/15 Pages) Xicor Inc. – SPI Serial E2PROM With Block LockTM Protection

X25320
Operational Notes
The X25320 powers-up in the following state:
•The device is in the low power standby state.
•A HIGH to LOW transition on CS is required to
enter an active state and receive an instruction.
•SO pin is high impedance.
•The “write enable” latch is reset.
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
•The “write enable” latch is reset upon power-up.
•A WREN instruction must be issued to set the “write
enable” latch.
•CS must come HIGH at the proper clock count in
order to start a write cycle.
Figure 1. Read E²PROM Array Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10
20 21 22 23 24 25 26 27 28 29 30
INSTRUCTION
SI
HIGH IMPEDANCE
SO
16 BIT ADDRESS
1514 13
3210
76
MSB
DATA OUT
543210
3063 ILL F03
Figure 2. Read Status Register Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
INSTRUCTION
SI
HIGH IMPEDANCE
SO
76
MSB
DATA OUT
543210
3063 ILL F04
5