IC149_13 Datasheet, PDF (3/8 Pages) IC-Haus GmbH – PROGRAMMABLE ns-PULSE GENERATOR

iC149
preliminary
PROGRAMMABLE ns-PULSE GENERATOR
PIN CONFIGURATION
Rev A2, Page 3/8
Figure 1: The populated PCB
Figure 2: Pin configuration J1 (PCB bottom view)
J1 16 pole pin header for power supply and sig-
nal outputs
J2 RJ45 connector for output signals with LVDS
or TTL/CMOS levels
J3 TRIGGER: SMA connector for trigger output,
Rout = 50 Ω
JP1 Jumper at position 1-2 selects TTL/CMOS
signals for J2
JP2 Jumper at position 1-2: variable frequency
from 10 kHz to 2 MHz
Jumper at position 2-3: variable frequency
from 1 to 100 kHz
JP3 Jumper at position 1-2: crystal stabilised
fixed frequency of 1 MHz
Jumper at position 2-3: variable frequency
from 1 kHz to 2 MHz (see JP2)
S1 Oscillator ON/OFF
S2 Selector switch: programmable pulse or sym-
metrical 1 MHz signal
S3 Coding switch fine
S4 Coding switch coarse
TP1 LVDS signal at J1 (must be terminated with
100 Ω for measurement purpose)
TP2 LVDS signal at J1
TP3 TTL/CMOS signal at J1
TP4 LVDS signal at J2
P1 Trimmer for setting the variable frequency
GND GND
V5 5 V Power supply
3V3 3.3 V
Table 2: Connectors on the PCB