IC-NQC_13 Datasheet, PDF (24/30 Pages) IC-Haus GmbH – Sin/D CONVERTER WITH SIGNAL CALIBRATION

iC-NQC
13-bit Sin/D CONVERTER WITH SIGNAL CALIBRATION
EEPROM INTERFACE
Rev D3, Page 24/30
The serial EEPROM interface consists of the two pins
SCL and SDA and enables read and write access to a
serial EEPROM with I²C interface (with at least 128
bytes, 5 V type with a 3.3 V function; e.g. 24C01,
24C02, 24C08 and maximal 24C16).
The configuration data in the EEPROM, of addresses
0x00 to 0x0F, is secured by a CRC check value to ad-
dress 0x0F. When the device is powered up, the ad-
dress range from 0x00 to 0x0F is mapped onto iC-
NQC’s configuration RAM. The higher memory area
contains BiSS C slave registers and optional memory
banks available to the sensor system.
The register access to the configuration data and the
memory banks 1 to 7 (intended for EDS) can be re-
stricted by parameter RPL.
N.B. When writing configuration data to the EEPROM
(BiSS addresses 0x10 to 0x1F) a wait time of at least
4 ms must be allowed after each register.
Example of CRC Calculation Routine
unsigned char ucDataStream = 0;
int iCRCPoly = 0x127 ;
unsigned char ucCRC=0;
int i = 0;
ucCRC = 0 ; / / s t a r t v a l u e ! ! !
for ( iReg = 0; iReg <15; iReg ++)
{
ucDataStream = ucGetValue ( iReg ) ;
for ( i =0; i <=7; i ++) {
i f ( ( ucCRC & 0x80 ) ! = ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1 ) ^ iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream = ucDataStream << 1 ;
}
}
CRC_E2P
Code
0x00
...
0xFF
Adr 0x0F, Bit 7:0
Description
Check value formed by CRC polynomial 0x127
Table 49: Check value for EEPROM data
Register Configuration
BiSS Adr BiSS Adr Contents
hex
decimal
0x00...0F 0...15
Config. Data RAM (16 bytes)
0x10...1F 16...31
Config. Data EEPROM (16 bytes)
0x20...3F 32...63
Unused memory area (32 bytes)
BiSS C Slave-Registers (direct addresses):
0x40
64
Bank Select (1 byte)
0x41
65
EDS Bank (1 byte)
0x42...43 66...67
Profile ID (2 bytes)
0x44...47 68...71
Serial No. (4 bytes)
0x48...77 72...119 Slave Registers (48 bytes)
Device ID (6 bytes):
0x78
120
4E (default)
0x79
121
51 (default)
0x7A
122
43 (default)
0x7B
123
31 (default)
0x7C
124
Bit 7:3: Adr 0x00, Bit 2:0: TOS
0x7D
125
00 (default)
Manufacturer’s ID (2 bytes):
0x7E
126
69 (default)
0x7F
127
43 (default)
Table 50: Register overview
RPL
Code
0x0
0x1
Notes
Adr 0x03, Bit 3
Bank 0
0x40..7F
Config. Dat. BiSS ID
Bank 1..7 Bank 8..15
EDS
User Data
read /
write
read /
write
read /
write
read /
write
-
read*
read
read /
write
*) Exception: write to 0x40 and 0x7C is always
possible.
Table 51: Register protection settings