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IC-TW14 Datasheet, PDF (23/33 Pages) IC-Haus GmbH – IC-PMX Companion Chip
iC-TW14
iC-PMX Companion Chip
Rev A1, Page 23/33
SSI_ST
SSI_ST is a read-only register containing the single-
turn angle (in degrees) used with the iC-TW14’s SSI
multiturn interface.
Value
0 – 359
360 – 65,535
SSI_ST (0x60)
Description
Singleturn angle
Reserved (not used)
Table 45: SSI_ST Register
DIAG2_TIME
DIAG2_TIME is a read-only register that provides the
measured time from the beginning of the current ramp
to the occurence of the Wiegand pulse. DIAG2_TIME is
only valid when MODE/CMD = 2 or 3 (diagnostic mode
2 active).
Value
0 – 65,535
DIAG2_TIME (0x80)
Description
Wiegand pulse time (tpulse) in µsec
SSI_ST is calculated as
Table 48: DIAG2_TIME Register
SSI_ST = PMX _ST − SSI_OFS
See SSI_OFS on page 17 for more information on
the external singleturn sensor offset value SSI_OFS.
The number of bits of singleturn position used as sync
bits over the SSI multiturn interface is determined by
SSI_LENGTH and SSI_MSB. See SSI MULTITURN
INTERFACE on page 25 for more information.
DIAG2_RAMP
DIAG2_RAMP is a read-only register that provides the
measured length of the current ramp. DIAG2_RAMP is
only valid when MODE/CMD = 2 or 3 (diagnostic mode
2 active).
Value
0 – 65,535
DIAG2_RAMP (0x81)
Description
Current ramp duration (tramp) in µsec
SSI_MT
SSI_MT[15:0] is a read-only register which contains the
least significant word of the 32-bit multiturn count used
with the TW14’s SSI multiturn interface.
SSI_MT[15:0] (0x61)
Bits
Description
15:0
Corrected multiturn counter LSW (bits 15:0)
Table 49: DIAG2_RAMP Register
DIAG2_VWP
DIAG2_VWP is a read-only register that provides the
scaled peak voltage of the Wiegand pulse at tpulse as
measured at pin VWP. DIAG2_VWP is only valid when
MODE/CMD = 2 or 3 (diagnostic mode 2 active).
Table 46: SSI_MT[15:0] Register
SSI_MT[31:16] is a read-only register which contains
the most significant word of the 32-bit multiturn count.
Value
0 – 65,535
DIAG2_VWP (0x82)
Description
Scaled Wiegand pulse voltage (VWP)
Table 50: DIAG2_VWP Register
SSI_MT[31:16] (0x62)
Bits
Description
15:0
Corrected multiturn counter MSW (bits 31:16)
Table 47: SSI_MT[31:16] Register
The actual Wiegand pulse voltage (VWC) is calculated
as
VWP_FACTOR
VWC = VWP ·
256
At startup, the multiturn count is read via the iC-PMX
from FRAM addresses 0x000 – 0x005 and bits 31:0 are
used to initialize the multiturn counter in the iC-TW14.
The TW14’s multiturn counter value is corrected for the
external singleturn sensor’s offset (SSI_OFS) and ro-
tation direction (SSI_DIR). Bits 15:0 of this value are
available in SSI_MT[15:0] and bits 31:16 are available
in SSI_MT[31:16].
During operation SSI_MT is updated by counting
SSI_ST revolutions. The number of multiturn bits
used with the SSI multiturn interface is determined by
SSI_LENGTH and SSI_MSB. See SSI MULTITURN
INTERFACE on page 25 for more information.
See VWP_FACTOR on page 19 for more information.
VDD
VDD is a read-only register that provides the calculated
iC-TW14 power supply voltage (VDD).
Value
0 – 65,535
VDD (0x90)
Description
iC-TW14 VDD in mV
Table 51: VDD Register
VDD is filtered to provide a stable value.