HY62SF16806B Datasheet, PDF (9/11 Pages) Hynix Semiconductor – 512Kx16bit full CMOS SRAM

DATA RETENTION TIMING DIAGRAM 1
VCC
1.65V
DATA RETENTION MODE
tCDR
tR
VIH
VDR
/CS1
VSS
CS1>VCC-0.2V
DATA RETENTION TIMING DIAGRAM 2
VCC
1.65V
CS2
VDR
DATA RETENTION MODE
tCDR
tR
0.4V
VSS
CS2<0.2V
HY62SF16806B
Rev.00 /May. 2001
8