HY62SF16406C Datasheet, PDF (9/11 Pages) Hynix Semiconductor – 256Kx16bit full CMOS SRAM

DATA RETENTION TIMING DIAGRAM 1
VCC
1.7V
DATA RETENTION MODE
tCDR
tR
VIH
VDR
/CS1
VSS
CS1>VCC-0.2V
DATA RETENTION TIMING DIAGRAM 2
VCC
1.7V
CS2
VDR
0.2V
VSS
DATA RETENTION MODE
tCDR
tR
CS2<0.2V
HY62SF16406C Series
Rev.02 / Jun.01
8