HYMD132725B8-M Datasheet, PDF (8/17 Pages) Hynix Semiconductor – Unbuffered DDR SDRAM DIMM

HYMD132725B(L)8-M/K/H/L
DC CHARACTERISTICS II (TA=0 to 70^oC, Voltage referenced to VSS=0V)
Parameter
Symbol
Test Condition
-M
Speed
-K -H
-L
Unit
Not
e
Operating Current
Operating Current
Precharge Power Down
Standby Current
Idle Standby Current
Active Power Down
Standby Current
Active Standby Current
Operating Current
Operating Current
Auto Refresh Current
Self Refresh Current
Operating Current - Four
Bank Operation
IDD0
One bank; Active - Precharge; tRC=tRC(min);
tCK=tCK(min); DQ,DM and DQS inputs changing
twice per clock cycle; address and control inputs
changing once per clock cycle
1170 1080 1080 1080 mA
IDD1
One bank; Active - Read - Precharge;
Burst Length=2; tRC=tRC(min); tCK=tCK(min);
address and control inputs changing once per clock
1350
1260
1260
1080
mA
cycle
IDD2P
All banks idle; Power down mode; CKE=Low,
tCK=tCK(min)
270
mA
IDD2F
/CS=High, All banks idle; tCK=tCK(min);
CKE=High; address and control inputs changing
once per clock cycle.
VIN = VREF for DQ, DQS and DM
630
mA
IDD3P
One bank active; Power down mode; CKE=Low,
tCK=tCK(min)
360
mA
IDD3N
/CS=HIGH; CKE=HIGH; One bank; Active-
Precharge; tRC=tRAS(max); tCK=tCK(min);
DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing
once per clock cycle
720
mA
IDD4R
Burst=2; Reads; Continuous burst; One bank
active; Address and control inputs changing once
per clock cycle; tCK=tCK(min); IOUT=0mA
2070 2070 2070 1710
IDD4W
Burst=2; Writes; Continuous burst; One bank
active; Address and control inputs changing once
per clock cycle; tCK=tCK(min); DQ, DM and DQS
inputs changing twice per clock cycle
2070 2070 2070 1710 mA
IDD5
tRC=tRFC(min) - 8*tCK for DDR200 at 100Mhz,
10*tCK for DDR266A & DDR266B at 133Mhz;
distributed refresh
1710 1710 1710 1620
IDD6
CKE=< 0.2V; External clock on;
tCK=tCK(min)
Normal
Low Power
36
18
mA
mA
IDD7
Four bank interleaving with BL=4, Refer to the
following page for detailed test condition
2700 2700 2700 2340 mA
Note : Power consumption by PLL, Register, PCB is not included in this table
Rev. 0.3/May. 02
8