HYMD232M646CF6-J Datasheet, PDF (7/20 Pages) Hynix Semiconductor – Unbuffered DDR SO-DIMM

CAPACITANCE (TA=25^oC, f=100MHz )
HYMD232M646C(L)F6-J/M/K/H/L
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
A0 ~ A12, BA0, BA1
/RAS, /CAS, /WE
CKE0, CKE1
/CS0, /CS1
CK0, /CK0, CK1, /CK1
Input Capacitance
DM0 ~ DM7
Data Input / Output Capacitance DQ0 ~ DQ63, DQS0 ~ DQS7
Data Input / Output Capacitance CB0 ~ CB7
Symbol Min
CIN1
25
CIN2
25
CIN3
25
CIN4
25
CIN5
20
CIN6
10
CIO1
10
CIO2
10
Max
40
40
40
40
25
15
15
15
Unit
pF
pF
pF
pF
pF
pF
pF
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
VTT
RT=50Ω
Output
Zo=50Ω
CL=30pF
VREF
Rev. 0.3 / Apr. 2004
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