GMS36 Datasheet, PDF (62/109 Pages) Hynix Semiconductor – 4-BIT SINGLE CHIP MICROCOMPUTERS

Chapter 5. INSTRUCTION
(39) RO
Naming :
Status :
Format :
Function :
<Purpose>
<Comment>
(40) WDTR
Naming :
Status :
Format :
Function :
<Purpose>
Reset Output Register Latch
é^Set
D(Y) à 0
0õYõ7
REMOUT à 1
Y = 8 at GMS36XXX(T)
REMOUT à 0
Y = 8 at GMS37XXX(T)
D0~D9 à 0
Y=9
R(Y) à 0
Ah õ Y õ Dh
Rà0
Y = Eh
D0~D9, R à 0
Y = Fh
A single D output line is set to logic 0, if data of Y-register is
between 0 to 9.
REMOUT port is set to logic 0, if data of Y-register is 9.
All D output line is set to logic 0, if data of Y-register is 9.
When Y is between Ah and Dh, one of R output lines is set at
logic 0.
When Y is Eh, the output of R is set at logic 0
When Y is Fh, the output D0~D9 and R are set at logic 1.
Data of Y-register is between 0 to 7, selects appropriate D
output.
Data of Y-register is 8, selects REMOUT port.
Data of Y-register is 9, selects D port.
Data in Y-register, when between Ah and Dh, selects an
appropriate R output (R0~R3).
Data in Y-register, when it is Eh, selects all of R0~R3.
Data in Y-register, when it is Fh, selects all of D0~D9 and
R0~R3.
Watch Dog Timer Reset
é^Set
Reset Watch Dog Timer (WDT)
Normally, you should reset this counter before overflowed
counter for dc watch dog timer. this instruction controls this
reset signal.
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