HYMD232G726BF8-J Datasheet, PDF (6/16 Pages) Hynix Semiconductor – Registered DDR SDRAM DIMM

CAPACITANCE (TA=25^oC, f=100MHz )
HYMD232G726B(L)F8-J
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
A0 ~ A12, BA0, BA1
/RAS, /CAS, /WE
CKE0, CKE1
CS0, CS1
CK0, /CK0
DM0 ~ DM8
DQ0 ~ DQ63, DQS0 ~ DQS8
CB0 ~ CB7
Symbol Min
CIN1
7
CIN2
7
CIN3
7
CIN4
7
CIN5
7
CIN6
6
CIO1
6
CIO2
6
Max
12
12
12
12
14
11
11
11
Unit
pF
pF
pF
pF
pF
pF
pF
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.1 / Mar. 2004
6