HYMD132G725B8M-M Datasheet, PDF (6/17 Pages) Hynix Semiconductor – Low Profile Registered DDR SDRAM DIMM

CAPACITANCE (TA=25^oC, f=100MHz )
HYMD132G725B(L)8M-M/K/H/L
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
A0 ~ A11, BA0, BA1
/RAS, /CAS, /WE
CKE0, CKE1
CS0, CS1
CK0, /CK0
DM0 ~ DM8
DQ0 ~ DQ63, DQS0 ~ DQS8
CB0 ~ CB7
Note :
1. VDD=min. to max., VDDQ=2.3V to 2.7V, VODC=VDDQ/2, VOpeak-to-peak=0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Symbol Min
CIN1
TBD
CIN2
TBD
CIN3
TBD
CIN4
TBD
CIN5
TBD
CIN6
TBD
CIO1
TBD
CIO2
TBD
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
pF
pF
pF
pF
pF
pF
pF
pF
O u tp ut
VTT
R T=50Ω
Zo=50Ω
C L=30pF
VREF
Rev. 0.3/May. 02
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