HYMD132G725B4M-M Datasheet, PDF (6/16 Pages) Hynix Semiconductor – Low Profile Registered DDR SDRAM DIMM

HYMD132G725B(L)4M-M/K/H/L
CAPACITANCE (TA=25^oC, f=100MHz )
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
A0 ~ A11, BA0, BA1
/RAS, /CAS, /WE
CKE0
CS0
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
CK0, /CK0
DQ0 ~ DQ63, DQS0 ~ DQS17
CB0 ~ CB7
Note :
1. VDD=min. to max., VDDQ=2.3V to 2.7V, VODC=VDDQ/2, VOpeak-to-peak=0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Symbol
CIN1
CIN2
CIN3
CIN4
CIN5
CIO1
CIO2
Min
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
pF
pF
pF
pF
pF
pF
pF
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.4/Jul. 02
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