HYMD116G725BL8-M Datasheet, PDF (6/17 Pages) Hynix Semiconductor – Registered DDR SDRAM DIMM

CAPACITANCE (TA=25 ^oC, f=100MHz )
HYMD116G725B(L)8-M/K/H/L
Parameter
Pin
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Input Capacitance
Data Input / Output Capacitance
Data Input / Output Capacitance
A0 ~ A11, BA0, BA1
/RAS, /CAS, /WE
CKE0
CS0
CK0, /CK0
DM0 ~ DM8
DQ0 ~ DQ63, DQS0 ~ DQS8
CB0 ~ CB7
Note :
1. VDD=min. to max., VDDQ=2.3V to 2.7V, VODC=VDDQ/2, VOpeak-to-peak=0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Symbol Min
CIN1
5
CIN2
5
CIN3
5
CIN4
5
CIN5
5
CIN6
10
CIO1
10
CIO2
10
Max
12
12
12
12
12
13
13
13
Unit
pF
pF
pF
pF
pF
pF
pF
pF
Output
VTT
RT=50Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.3/May. 02
6