HY5DU56422BT-D4 Datasheet, PDF (4/32 Pages) Hynix Semiconductor – 256M-P DDR SDRAM

PIN CONFIGURATION
x4
VDD
NC
VDDQ
NC
DQ0
VSSQ
NC
NC
VDDQ
NC
DQ1
VSSQ
NC
NC
VDDQ
NC
NC
VDD
DNU
NC
/WE
/CAS
/RAS
/CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
x8
VDD
DQ0
VDDQ
NC
DQ1
VSSQ
NC
DQ2
VDDQ
NC
DQ3
VSSQ
NC
NC
VDDQ
NC
NC
VDD
DNU
NC
/WE
/CAS
/RAS
/CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
HY5DU56422BT-D4/D43
HY5DU56822BT-D4/D43
1
66
2
65
3
64
4
63
5
62
6
61
7
60
8
59
9
58
10
57
11
56
12
55
13
54
14
53
15 400mil X 875mil 52
16
17
66pin TSOP -II
51
50
18 _{0.65mm pin pitch} 49
19
48
20
47
21
46
22
45
23
44
24
43
25
42
26
41
27
40
28
39
29
38
30
37
31
36
32
35
33
34
x8
x4
VSS
DQ7
VSSQ
NC
DQ6
VDDQ
NC
DQ5
VSSQ
NC
DQ4
VDDQ
NC
NC
VSSQ
DQS
NC
VREF
VSS
DM
/CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
VSS
NC
VSSQ
NC
DQ3
VDDQ
NC
NC
VSSQ
NC
DQ2
VDDQ
NC
NC
VSSQ
DQS
NC
VREF
VSS
DM
/CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
ROW AND COLUMN ADDRESS TABLE
ITEMS
Organization
Row Address
Column Address
Bank Address
Auto Precharge Flag
Refresh
64Mx4
16M x 4 x 4banks
A0 - A12
A0-A9, A11
BA0, BA1
A10
8K
32Mx8
8M x 8 x 4banks
A0 - A12
A0-A9
BA0, BA1
A10
8K
Rev. 0.4 / Aug. 2003
4