HY5PS12421FP Datasheet, PDF (33/35 Pages) Hynix Semiconductor – 512Mb DDR2 SDRAM

1HY5PS12421FP
HY5PS12821FP
HY5PS121621FP
these points when the device is no longer driving (tRPST), or begins driving (tRPRE) by measuring the signal at two
VOH + xmV
VTT + 2xmV
tHZ
tRPST end point
VOH + 2xmV
VTT + xmV
tHZ
tRPRE begin point
VOL + 1xmV
VOL + 2xmV
VTT -xmV
VTT - 2xmV
tHZ , tRPST end point = 2*T1-T2
tLZ , tRPRE begin point = 2*T1-T2
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input signal cross-
ing at the V_IH(ac) level to the differential data strobe crosspoint for a rising signal, and from the input signal crossing at
the V_IL(ac) level to the differential data strobe crosspoint for a falling signal applied to the device under test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal cross-
ing at the V_IH(dc) level to the differential data strobe crosspoint for a rising signal and V_IL(dc) to the differential data
strobe crosspoint for a falling signal applied to the device under test.
Differential Input waveform timing
DQS
DQS
tDS tDH
tDS tDH
VDDQ
VIH(ac)min
VIH(dc)min
VREF(dc)
VIL(dc)max
VIL(ac)max
VSS
22. Input waveform timing is referenced from the input signal crossing at the V_IH(ac) level for a rising signal and V_IL(ac)
for a falling signal applied to the device under test.
23. Input waveform timing is referenced from the input signal crossing at the V_IL(dc) level for a rising signal and V_IH(dc)
for a falling signal applied to the device under test.
Rev. 1.0 / Feb. 2005
33