HY5PS12421FP Datasheet, PDF (19/35 Pages) Hynix Semiconductor – 512Mb DDR2 SDRAM

1HY5PS12421FP
HY5PS12821FP
HY5PS121621FP
3.5. Input/Output Capacitance
Parameter
Input capacitance, CK and CK
Input capacitance delta, CK and CK
Input capacitance, all other input-only pins
Input capacitance delta, all other input-only pins
Input/output capacitance, DQ, DM, DQS, DQS
Input/output capacitance delta, DQ, DM, DQS, DQS
Symbol
CCK
CDCK
CI
CDI
CIO
CDIO
DDR2 400
DDR2 533
Min
Max
1.0
2.0
x
0.25
1.0
2.0
x
0.25
2.5
4.0
x
0.5
DDR2 667
DDR2 800
Min
Max
1.0
2.0
x
0.25
1.0
2.0
x
0.25
2.5
3.5
x
0.5
Units
pF
pF
pF
pF
pF
pF
4. Electrical Characteristics & AC Timing Specification
( 0 ℃ ≤ T_CASE ≤ 95℃; V_DDQ = 1.8 V +/- 0.1V; V_DD = 1.8V +/- 0.1V)
Refresh Parameters by Device Density
Parameter
Symbol
256Mb 512Mb 1Gb
Refresh to Active/Refresh command
time
tRFC
75
105 127.5
0 ℃≤ T_CASE ≤ 95℃
7.8
Average periodic refresh interval _tREFI
85℃＜ T_CASE ≤ 95℃ 3.9
7.8
7.8
3.9
3.9
2Gb
195
7.8
3.9
4Gb
327.5
7.8
3.9
Units
ns
ns
ns
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Speed
Bin(CL-tRCD-tRP)
Parameter
CAS Latency
tRCD
tRPNote1
tRAS
tRC
DDR2-667
5-5-5
min
5
15
15
45
60
DDR2-533
4-4-4
min
4
15
15
45
60
DDR2-400
3-3-3
min
3
15
15
40
55
Units
tCK
ns
ns
ns
ns
Note 1: 8 bank device Precharge All Allowance : tRP for a Precharge All command for and 8 Bank device
will equal to tRP+1*tCK, where tRP are the values for a single bank prechrarge, which are shown in the
above table.
Rev. 1.0 / Feb. 2005
19