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HY5PS1G831F Datasheet, PDF (32/33 Pages) Hynix Semiconductor – 1Gb DDR2 SDRAM
1HY5PS1G431(L)F
1HY5PS1G831(L)F
ure shows a method to calculate these points when the device is no longer driving (tRPST), or begins driv-
ing (tRPRE) by measuring the signal at two different voltages. The actual voltage measurement points are
not critical as long as the calculation is consistent.
tHZ
tRPST end point
VOH + xmV
VOH + 2xmV
VOL + 1xmV
VOL + 2xmV
tHZ , tRPST end point = 2*T1-T2
VTT + 2xmV
VTT + xmV
VTT -xmV
VTT - 2xmV
tHZ
tRPRE begin point
tLZ , tRPRE begin point = 2*T1-T2
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input
signal crossing at the VIH(ac) level to the differential data strobe crosspoint for a rising signal, and from the
input signal crossing at the VIL(ac) level to the differential data strobe crosspoint for a falling signal applied
to the device under test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input
signal crossing at the VIH(dc) level to the differential data strobe crosspoint for a rising signal and VIL(dc) to
the differential data strobe crosspoint for a falling signal applied to the device under test.
Differential Input waveform timing
DQS
DQS
tDS tDH
tDS tDH
VDDQ
VIH(ac)min
VIH(dc)min
VREF(dc)
VIL(dc)max
VIL(ac)max
VSS
22. Input waveform timing is referenced from the input signal crossing at the VIH(ac) level for a rising signal
and VIL(ac) for a falling signal applied to the device under test.
23. Input waveform timing is referenced from the input signal crossing at the VIL(dc) level for a rising signal
and VIH(dc) for a falling signal applied to the device under test.
Rev. 1.2 / Dec 2006
32