HY5DU561622ETP Datasheet, PDF (3/30 Pages) Hynix Semiconductor – 256M(16Mx16) gDDR SDRAM

1HY5DU561622ETP
DESCRIPTION
The Hynix HY5DU561622ETP is a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited
for the point-to-point applications which requires high bandwidth.
The Hynix 16Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,
Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are inter-
nally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible
with SSTL_2.
FEATURES
• 2.5V +/-5% VDD and VDDQ power supply
supports 250/200 Mhz
• 2.6V +/- 0.1V VDD/VDDQ power supply supports
300/ 275Mhz
• 2.8V +/- 0.1V VDD/ VDDQ power supply supports
350Mhz
• All inputs and outputs are compatible with SSTL_2
interface
• JEDEC standard 400mil 66pin TSOP-II with 0.65mm
pin pitch
• Fully differential clock inputs (CK, /CK) operation
• Double data rate interface
• Source synchronous - data transaction aligned to
bidirectional data strobe (DQS)
• x16 device has 2 bytewide data strobes (LDQS,
UDQS) per each x8 I/O
• Data outputs on DQS edges when read (edged DQ)
Data inputs on DQS centers when write (centered
DQ)
• Data(DQ) and Write masks(DM) latched on the both
rising and falling edges of the data strobe
• All addresses and control inputs except Data, Data
strobes and Data masks latched on the rising edges
of the clock
• Write mask byte controls by LDM and UDM
• Programmable /CAS latency 3 / 4 / 5 supported
• Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
• Internal 4 bank operations with single pulsed /RAS
• tRAS Lock-Out function supported
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
ORDERING INFORMATION
Part No.
HY5DU561622ETP-28
HY5DU561622ETP-33
HY5DU561622ETP-36
HY5DU561622ETP-4
HY5DU561622ETP-5
Power Supply
VDD=2.8V
VDDQ=2.8V
VDD=2.6V
VDDQ=2.6V
VDD=2.5V
VDDQ=2.5V
Clock
Frequency
350MHz
300MHz
275MHz
250MHz
200MHz
Max Data Rate interface Package
700Mbps/pin
600Mbps/pin
550Mbps/pin
500Mbps/pin
400Mbps/pin
SSTL-2
400mil 66pin
TSOP-II
Note) Hynix supports Pb free parts for each speed grade with same specification, except Lead free material.
We’ll add “P” character after “T” for Lead free product. For example, the part number of 300MHz
Lead free product is HY5DU561622ETP-33.
Rev. 1.1 / Oct. 2005
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