HY57V64420HG Datasheet, PDF (3/11 Pages) Hynix Semiconductor – 4 Banks x 4M x 4Bit Synchronous DRAM

FUNCTIONAL BLOCK DIAGRAM
4Mbit x 4banks x 4 I/O Synchronous DRAM
HY57V64420HG
Self refresh logic
& timer
Internal Row
counter
CLK
CKE
CS
RAS
CAS
WE
DQM
Row active
Row
Pre
Decoders
refresh
Column
Active
Column
Pre
Decoders
4Mx4 Bank3
4Mx4 Bank 2
4Mx4 Bank 1
4Mx4 Bank 0
Memory
Cell
Array
Y decoders
Bank Select
Column Add
Counter
A0
Address
A1
Registers
Burst
Counter
DQ0
DQ1
DQ2
DQ3
A11
BA0
BA1
Mode Registers
CAS Latency
Data Out Control ^{Pipe Line Control}
Rev. 0.4/Nov. 01
3