HMS77C1000A Datasheet, PDF (28/45 Pages) Hynix Semiconductor – 8-BIT SINGLE-CHIP MICROCONTROLLERS

HMS77C1000A/HMS77C1001A
V_DD
Data Reg.
Data Bus
Data Bus
Direction Reg.
Data Bus
V_SS
Read
FIGURE 10-4 EQUIVALENT CIRCUIT FOR A SINGLE I/O PIN
Name Address Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Power-On
Reset
RESET and
WDT Reset
TRIS N/A
I/O control registers (TRISA, TRISB)
1111 1111 1111 1111
RA
05_H
RB
06_H
-
-
-
-
RA3 RA2 RA1 RA0 ---- xxxx ---- uuuu
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuu
TABLE 10-1 SUMMARY OF PORT REGISTERS
Legend: Shaded boxes = unimplemented or unused, - = unimplemented, read as ‘0’, x = unknown, u = unchanged.
Otherwise, the previous state of that pin may be read into
the CPU rather than the new state.
When in doubt, it is better to separate these instructions
with a NOP or another instruction not accessing this I/O
port.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Instruction
fetched
PC
output RB
PC+1
read RB port
PC+2
PC+3
no operation no operation
RB7:RB0
Port pin
written here
Port pin
read here
This example shows a write
to RB followed by a read
from RB.
FIGURE 10-5 SUCCESSIVE I/O OPERATION
Oct. 2001 Ver. 2.0
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