HB7121B Datasheet, PDF (20/29 Pages) Hynix Semiconductor – CMOS IMAGE SENSOR With 8-bit ADC

Semiconductor Inc.
System IC SBU
FRAME TIMING DIAGRAMS
HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
There are two frame timing cases,
l Integration Time < EffectiveWindowHeight * Scale
l Integration Time > EffectiveWindowHeight * Scale
EffectiveWindowHeight is equal to the number of data lines generated in a frame and is defined to be
selected by
if((RowStartAddress + WindowHeight + 1) <= (SensorArrayHeight)
EffectiveWindowHeight = WindowHeight;
else
EffectiveWidnowHeight = (SensorArrayHeight - RowStartAddress - 1);
For example, RowStartAddress = 200 and WindowHeight = 300, EffectiveWindowHeight is 113 and 113
data lines per a frame are generated.
Note : The above selection logic is somewhat confusing in respect of general counting measure. It’s partly
due to the mixed use of indexing start points, i.e. ‘0’ and ‘1’ in the design. Therefore in order to avoid the
confusion it is desirable to just follows the equation when you estimate the frame rate.
SensorArrayHeight
[314]
SensorArrayWidth
[414]
(0,0)
EffectiveWindowHeight
[113]
RowStartAddress
[200]
WindowHeight
[300]
Scale is selected according to Integration Time Mode by
If(PixelMode) Scale = SensorArrayWidth; // For400*300 resolution chip, SensorArrayWidth is 414
else
Scale = 1;
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume
any responsibility for use of circuits described. NO patent licenses are implied.
DA21000601R_1.0
- 20 -
2001 Hnix System IC SBU