HB7121B Datasheet, PDF (16/29 Pages) Hynix Semiconductor – CMOS IMAGE SENSOR With 8-bit ADC

Semiconductor Inc.
System IC SBU
< Pixel Array Structure >
total pixel : 416 * 316
+1 : dummy area
+1 : dummy zone for set of color pattern
+2 : optical block zone
+3 : margin for metal 3 slope
+1 : interpolation area
pixel array : 400 * 300
---- R G
GB G B
RG
- ---
active window area (402 * 302)
accessible address range(414 * 314)
BG
GR
HB7121B
CMOS IMAGE SENSOR
With 8-bit ADC
(8) HSYNC Blanking Time Register
(Higher byte : Address 20h, default : 00h, R/W)
(Lower byte : Address 21h, default : 03h, R/W)
HSYNC low duration is HSYNC blanking time plus (828-2*window width)*main clock period.
It’s used to change duration between current line end and next line start.
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume
any responsibility for use of circuits described. NO patent licenses are implied.
DA21000601R_1.0
- 16 -
2001 Hnix System IC SBU