HMP164S6EFR6C-C4 Datasheet, PDF (16/23 Pages) Hynix Semiconductor – 200pin Unbuffered DDR2 SDRAM SO-DIMMs

1200pin Unbuffered DDR2 SDRAM SO-DIMMs
Electrical Characteristics & AC Timings
Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Speed
Bin (CL-tRCD-tRP)
Parameter
CAS Latency
tRCD
tRP
tRAS
tRC
DDR2-800 (S5)
5-5-5
min
5
12.5
12.5
45
57.5
DDR2-800 (S6)
6-6-6
min
6
15
15
45
60
DDR2-667 (Y5)
5-5-5
min
5
15
15
45
60
DDR2-533 (C4)
4-4-4
min
4
15
15
45
60
Unit
tCK
ns
ns
ns
ns
AC Timing Parameters by Speed Grade
Parameter
Symbol
Data-Out edge to Clock edge Skew
DQS-Out edge to Clock edge Skew
Clock High Level Width
Clock Low Level Width
tAC
tDQSCK
tCH
tCL
Clock Half Period
tHP
System Clock Cycle Time
tCK
DQ and DM input setup time
tDS
DQ and DM input hold time
tDH
DQ and DM input setup time (single-ended strobe) tDS1
DQ and DM input hold time (single-ended strobe) tDH1
Control & Address input Pulse Width for each input tIPW
DQ and DM input pulse width for each input pulse
width for each input
tDIPW
Data-out high-impedance window from CK, /CK
tHZ
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ signals
DQ hold skew factor
DQ/DQS output hold time from DQS
First DQS latching transition to associated clock
edge
DQS input high pulse width
DQS input low pulse width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Mode register set command cycle time
Write preamble
Write postamble
Data-Out edge to Clock edge Skew
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
tDQSL
tDSS
tDSH
tMRD
tWPRE
tWPST
tAC
Address and control input setup time
tIS
DDR2-400
Min
Max
-600
600
-500
500
0.45
0.55
0.45
0.55
min
(tCL, tCH)
-
5000
8000
150
-
275
-
25
-
25
-
0.6
-
0.35
-
-
tAC min
2*tAC min
-
-
tHP - tQHS
-0.25
tAC max
tAC max
tAC max
350
450
-
+0.25
0.35
-
0.35
-
0.2
-
0.2
-
2
-
0.35
-
0.4
0.6
-600
600
350
-
DDR2-533
Min
Max
-500
500
-450
450
0.45
0.55
0.45
0.55
min
(tCL, tCH)
-
3750
8000
100
-
225
-
-25
-
-25
-
0.6
-
Unit Note
ps
ns
CK
CK
ns
ps
ps 1
ps 1
ps 1
ps 1
tCK
0.35
-
tCK
-
tAC min
2*tAC min
-
-
tHP - tQHS
-0.25
tAC max ps
tAC max ps
tAC max ps
300
ps
400
ps
-
ps
+0.25 tCK
0.35
0.35
0.2
0.2
2
0.35
0.4
-500
250
-
tCK
-
tCK
-
tCK
-
tCK
-
tCK
-
tCK
0.6
tCK
500
ps
-
ps
Rev. 0.3 / Dec. 2009
16