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HYMD564G726BF8N-D43 Datasheet, PDF (1/20 Pages) Hynix Semiconductor – 184pin Registered DDR SDRAM DIMMs | |||
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184pin Registered DDR SDRAM DIMMs based on 512Mb B ver. (FBGA)
This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 512Mb B ver. DDR SDRAMs in 60 ball
FBGA package on a 184pin glass-epoxy substrate. This Hynix 512Mb B ver. based Registered DIMM series provide a
high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange
and addition.
FEATURES
⢠JEDEC Standard 184-pin dual in-line memory module
(DIMM)
⢠One rank 128M x 72, 64M x 72 organization
⢠Error Check Correction (ECC) Capability
⢠2.6V ± 0.1V VDD and VDDQ Power supply for
DDR400 and 2.5V ± 0.2V for DDR333
⢠All inputs and outputs are compatible with SSTL_2
interface
⢠Fully differential clock operations (CK & /CK) with
166/200MHz
⢠DLL aligns DQ and DQS transition with CK transition
⢠Programmable CAS Latency: DDR333(2.5 clock),
DDR400(3 clock)
⢠Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
⢠Edge-aligned DQS with data outs and Center-aligned
DQS with data inputs
⢠Auto refresh and self refresh supported
⢠8192 refresh cycles / 64ms
⢠Serial Presence Detect (SPD) with EEPROM
⢠Built with 512Mb DDR SDRAMs in 60 ball FBGA pack-
ages
⢠Lead-free product listed for each configuration
(RoHS compliant)
ADDRESS TABLE
Organization Ranks SDRAMs
512MB
1GB
64M x 72
128M x 72
1
64Mb x 8
1
128Mb x 4
# of
DRAMs
9
18
# of row/bank/column Address
13(A0~A12)/2(BA0,BA1)/11(A0~A9,A11)
13(A0~A12)/2(BA0,BA1)/12(A0~A9,A11,A12)
Refresh
Method
8K / 64ms
8K / 64ms
PREFORMANCE
Part-Number Suffix
Speed Bin
CL - tRCD- tRP
Max Clock
Frequency
CL=3
CL=2.5
CL=2
-D431
DDR400B
3-3-3
200
166
133
-J
Unit
DDR333
-
2.5-3-3
CK
-
MHz
166
MHz
133
MHz
Note:
1. 2.6V ± 0.1V VDD and VDDQ Power supply for DDR400 and 2.5V ± 0.2V for DDR333
Rev. 1.1 /May. 2005
1
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
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