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HY29F400A Datasheet, PDF (1/40 Pages) Hynix Semiconductor – 4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory | |||
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HY29F400A
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
KEY FEATURES
5 Volt Read, Program, and Erase
â Minimizes system-level power requirements
High Performance
â Access times as fast as 50 ns
Low Power Consumption
â 20 mA typical active read current in byte
mode, 28 mA typical in word mode
â 30 mA typical program/erase current
â 5 µA maximum CMOS standby current
Compatible with JEDEC Standards
â Package, pinout and command-set
compatible with the single-supply Flash
device standard
â Provides superior inadvertent write
protection
Sector Erase Architecture
â Boot sector architecture with top and
bottom boot block options available
â One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
and seven 64 Kbyte sectors in byte mode
â One 8 Kword, two 4 Kword, one 16 Kword
and seven 32 Kword sectors in word mode
â A command can erase any combination of
sectors
â Supports full chip erase
Erase Suspend/Resume
â Temporarily suspends a sector erase
operation to allow data to be read from, or
programmed into, any sector not being
erased
GENERAL DESCRIPTION
The HY29F400A is a 4 Megabit, 5 volt only CMOS
Flash memory organized as 524,288 (512K) bytes
or 262,144 (256K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F400A can be programmed and erased
in-system with a single 5-volt VCC supply. Internally
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered
for timing compatibility with the zero wait state re-
quirements of high speed microprocessors. A 55
ns version operating over 5.0 volts ± 5% is also
Preliminary
Revision 1.0, January 2002
Sector Protection
â Any combination of sectors may be locked
to prevent program or erase operations
within those sectors
Temporary Sector Unprotect
â Allows changes in locked sectors
(requires high voltage on RESET# pin)
Internal Erase Algorithm
â Automatically erases a sector, any
combination of sectors, or the entire chip
Internal Programming Algorithm
â Automatically programs and verifies data
at a specified address
Fast Program and Erase Times
â Byte programming time: 7 µs typical
â Sector erase time: 1.0 sec typical
â Chip erase time: 11 sec typical
Data# Polling and Toggle Status Bits
â Provide software confirmation of
completion of program or erase
operations
Ready/Busy# Output (RY/BY#)
â Provides hardware confirmation of
completion of program and erase
operations
100,000 Program/Erase Cycles Minimum
Space Efficient Packaging
â Available in industry-standard 44-pin
PSOP and 48-pin TSOP and reverse
TSOP packages
LOGIC DIAGRAM
18
A[17:0]
8
DQ[7:0]
7
CE#
DQ[14:8]
OE#
WE#
DQ[15]/A-1
RESET#
RY/BY#
BYTE#
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