HY29DS322 Datasheet, PDF (1/6 Pages) Hynix Semiconductor – 32 Megabit (4M x 8/2M x16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory

HY29DS322/HY29DS323
32 Megabit (4M x 8/2M x16) Super-Low Voltage,
Dual Bank, Simultaneous Read/Write, Flash Memory
KEY FEATURES
n Single Power Supply Operation
− Read, program, and erase operations
from 1.8 to 2.2 V (2.0V ± 10%)
− Ideal for battery-powered applications
n Simultaneous Read/Write Operations
− Host system can program or erase in one
bank while simultaneously reading from any
sector in the other bank with zero latency
between read and write operations
n High Performance
− 100, 110 and 120 ns access time versions
n Ultra Low Power Consumption (Typical
Values)
− Automatic sleep mode current: 5 µA
− Standby mode current: 5 µA
− Read current: 5 mA (at 5 MHz)
− Program/erase current: 20 mA
n Boot-Block Sector Architecture with 71
Sectors in Two Banks for Fast In-System
Code Changes
n Secured Sector: An Extra 64 Kbyte Sector
that Can Be:
− Factory locked and identifiable: 16 bytes
available for a secure, random factory
Electronic Serial Number
− Customer lockable: Can be read, program-
med, or erased just like other sectors
n Flexible Sector Architecture
− Sector Protection allows locking of a
sector or sectors to prevent program or
erase operations within that sector
− Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
n Automatic Erase Algorithm Erases Any
Combination of Sectors or the Entire Chip
n Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
n Compliant with Common Flash Memory
Interface (CFI) Specification
n Minimum 100,000 Write Cycles per Byte/
Word
n Compatible with JEDEC Standards
− Pinout and software compatible with
single-power supply Flash devices
− Superior inadvertent write protection
n Data# Polling and Toggle Bits
− Provide software confirmation of completion
of program or erase operations
n Ready/Busy# Pin
− Provides hardware confirmation of
completion of program or erase operations
n Erase Suspend
− Suspends an erase operation to allow
programming data to or reading data from
a sector in the same bank
− Erase Resume can then be invoked to
complete the suspended erasure
n Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
n WP#/ACC Input Pin
− Write protect (WP#) function allows
hardware protection of two outermost boot
sectors, regardless of sector protect status
− Acceleration (ACC) function provides
accelerated program times
n Fast Program and Erase Times
− Sector erase time: 2 sec typical
− Byte/Word program time utilizing
Acceleration function: 10 µs typical
n Space Efficient Packaging
− 48-pin TSOP and 48-ball FBGA
packages
LOGIC DIAGRAM
21
A[20:0]
CE#
OE#
WE#
15
DQ[14:0]
DQ[15]/A[-1]
WP#/ACC
RY/BY#
RESET#
BYTE#
Product Brief May 2001